A leading High frequency trading firm is looking to hire a digital design verification engineer to work on verification of FPGA based acceleration platform for low latency algorithmic trading. The successful candidate will work closely with the FPGA design team and will be responsible for development of verification strategy, testbench and debugging of FPGA based accelerator.
- Degree in electronics/engineering related subjects
- 2+ years of experience in design verification using UVM
- Excellent analytical and debugging skills.
- Experience in developing self-contained UVM based testbenches and BFMs
- Experience of debugging FPGAs using Integrated Logic Analyzer
- Working knowledge of the following engineering tools; QuestaSim or similar, Xilinx ISE/EDK, C/C++
- Scripting; tcl, perl